# changelog

author: Solar Designer <solar@openwall.com> - 2.34-125.1.el9.security.0.11
changelog:
  - Fix assert() buffer overflow CVE-2025-0395 discovered by Qualys:
    https://www.openwall.com/lists/oss-security/2025/01/22/4


author: Solar Designer <solar@openwall.com> 8.7p1-43.el9_5.security.0.11
changelog:
  - Fix CVE-2025-26465 and minor bugs found by Qualys and Rocky Linux while
    searching the source code for similar error patterns


author: Solar Designer <solar@openwall.com> 0.9.8-1
changelog:
  - Update to 0.9.8
  - Add logger sub-package
  - Mark the sysctl configuration file config(noreplace)
  - Use "sort -V" to build against the latest installed version of kernel-devel


author: Solar Designer <solar@openwall.com> 0.9.8-2
changelog:
  - Pass direct kernel-devel's build path into make
  - Drop "BuildRequires: kernel" as we no longer need /lib/modules/*/build
  - Add "BuildRequires: systemd" for the _unitdir RPM macro (apparently this was
    previously an indirect dependency via the kernel package)


author: Solar Designer <solar@openwall.com> 0.9.9-4
changelog:
  - Pass -s -pie -Wl,-z,defs -Wl,-z,relro -Wl,-z,now and optflags into LDFLAGS
    when building the logger userspace binaries


author: Solar Designer <solar@openwall.com> 0.9.9-5
changelog:
  - Add -fPIE to logger CFLAGS for consistency with -pie in LDFLAGS
    (but no issues were seen on Rocky Linux 8 and 9 even without this change)


author: Solar Designer <solar@openwall.com> 0.8.0-1
changelog:
  - Add macros for use in RPM triggers
  - Add sub-package with facilities and triggers for shadow-utils


author: Solar Designer <solar@openwall.com> 0.8.0-2
changelog:
  - In addition to Requires(pre), also use Requires in the sub-package
  - In %triggerprein_control, pre-check that the facility exists
  - Use (renamed) copies of the trigger macros within this spec file


author: Solar Designer <solar@openwall.com> 0.8.0-3
changelog:
  - Rename the shadow sub-package to shadow-utils
  - Rename the source files not to differentiate them by sub-package
  - Add "Requires: shadow-utils" in the shadow-utils sub-package


author: Solar Designer <solar@openwall.com> 0.8.0-5
changelog:
  - Install control(8) mode 755 since some of its features work as non-root
  - Add sub-package with facilities and triggers for pam password hashing and
    password policy


author: Solar Designer <solar@openwall.com> 0.8.0-6
changelog:
  - Revise password-hash and password-policy to process the underlying two
    "sub-facilities" (for the two configuration files updated by each of these)
    using the same logic that we had used for mount (where the two underlying
    "sub-facilities" are the mount and umount programs)


author: Solar Designer <solar@openwall.com> 0.8.0-8
changelog:
  - Revise password-policy to allow for varying whitespace and options to
    pam_pwquality.so to accommodate lines produced by authselect, patch
    originally by Jason Rodriguez at CIQ
  - Revise password-hash to use \s in place of [[:space:]] for consistency


author: Solar Designer <solar@openwall.com> 0.8.0-9
changelog:
  - Correct the RPM triggers for mount (they were on util-linux, but should be on
    the util-linux-core sub-package)


author: Solar Designer <solar@openwall.com> 0.8.0-10
changelog:
  - Add yescrypt8 setting to password-hash meaning "yescrypt rounds=8" (128 MiB),
    which uses 8x more time and memory than default implied rounds 5 (16 MiB),
    yet (barely) fits the generally recommended (e.g., in the original scrypt
    paper) 100ms allowance on modern x86-64 CPUs at low system load running an
    EL9 kernel capable of using transparent huge pages for this
  - Add dropping of stale rounds= when switching between password-hash settings,
    so that an incompatible rounds override e.g. for yescrypt isn't wrongly
    reused for sha512crypt or vice versa, and so that choosing plain yescrypt
    also resets it to the default


author: Solar Designer <solar@openwall.com> 13-1
changelog:
  - Update to post version 13 git tag 2025092500, although there are almost no
    relevant changes since the previous version we were using


author: Solar Designer <solar@openwall.com> 13-2
changelog:
  - Rename /etc/sysctl.d/hardened_malloc.conf to 80-hardened_malloc.conf
  - Add workarounds for sssd (packaged /etc/sysconfig/sssd) and pcsd
    (added to /etc/sysconfig/pcsd triggered on pcs package installation)


author: Solar Designer <solar@openwall.com> 13-3
changelog:
  - Hook dlopen() and drop RTLD_DEEPBIND for PHP modules to avoid inconsistent
    linking with glibc vs. alternative allocators such as hardened_malloc, see
    https://github.com/php/php-src/issues/10670


author: Eugene Syromiatnikov <esyr@redhat.com> - 4:20220809-1
changelog:
  - Update Intel CPU microcode to microcode-20220510 release, addresses
    CVE-2022-21233 (#2115663):
    - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
      intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006d05 up
      to 0x2006e05;
    - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015d
      up to 0x100015e;
    - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000363
      up to 0xd000375;
    - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3a up
      to 0x3c;
    - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1e up
      to 0x20;
    - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb0
      up to 0xb2;
    - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x26 up
      to 0x28;
    - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x3e up
      to 0x40;
    - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode from revision
      0x1f up to 0x22;
    - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
      intel-ucode/06-97-02) from revision 0x1f up to 0x22;
    - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-02)
      from revision 0x1f up to 0x22;
    - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-02)
      from revision 0x1f up to 0x22;
    - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in
      intel-ucode/06-97-05) from revision 0x1f up to 0x22;
    - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode from revision 0x1f
      up to 0x22;
    - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-05)
      from revision 0x1f up to 0x22;
    - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-05)
      from revision 0x1f up to 0x22;
    - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
      0x41c up to 0x421;
    - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
      intel-ucode/06-9a-03) from revision 0x41c up to 0x421;
    - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
      intel-ucode/06-9a-04) from revision 0x41c up to 0x421;
    - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x41c
      up to 0x421;
    - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x53 up
      to 0x54;
    - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in
      intel-ucode/06-bf-02) from revision 0x1f up to 0x22;
    - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
      intel-ucode/06-bf-02) from revision 0x1f up to 0x22;
    - Update of 06-bf-02/0x03 (ADL C0) microcode from revision 0x1f up
      to 0x22;
    - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-bf-02)
      from revision 0x1f up to 0x22;
    - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in
      intel-ucode/06-bf-05) from revision 0x1f up to 0x22;
    - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
      intel-ucode/06-bf-05) from revision 0x1f up to 0x22;
    - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-bf-05)
      from revision 0x1f up to 0x22;
    - Update of 06-bf-05/0x03 (ADL C0) microcode from revision 0x1f up
      to 0x22.


author: Eugene Syromiatnikov <esyr@redhat.com> - 4:20230214-1
changelog:
  - Update Intel CPU microcode to microcode-20230214 release, addresses
    CVE-2022-21216, CVE-2022-33196, CVE-2022-33972, CVE-2022-38090 (#2171237,
      - Addition of 06-6c-01/0x10 (ICL-D B0) microcode at revision 0x1000211;
    - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode at revision
      0x2b000181;
    - Addition of 06-8f-04/0x10 microcode at revision 0x2c000170;
    - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-04) at revision 0x2b000181;
    - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
      intel-ucode/06-8f-04) at revision 0x2c000170;
    - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-04) at revision 0x2b000181;
    - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) at
      revision 0x2c000170;
    - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-04) at revision 0x2b000181;
    - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-04) at revision 0x2b000181;
    - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
      intel-ucode/06-8f-04) at revision 0x2c000170;
    - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-05) at revision 0x2b000181;
    - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) at
      revision 0x2c000170;
    - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode at revision
      0x2b000181;
    - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode at revision
      0x2c000170;
    - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-05) at revision 0x2b000181;
    - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) at
      revision 0x2c000170;
    - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-05) at revision 0x2b000181;
    - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-05) at revision 0x2b000181;
    - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
      intel-ucode/06-8f-05) at revision 0x2c000170;
    - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-06) at revision 0x2b000181;
    - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) at
      revision 0x2c000170;
    - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-06) at revision 0x2b000181;
    - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
      intel-ucode/06-8f-06) at revision 0x2c000170;
    - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode at revision
      0x2b000181;
    - Addition of 06-8f-06/0x10 microcode at revision 0x2c000170;
    - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-06) at revision 0x2b000181;
    - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-06) at revision 0x2b000181;
    - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
      intel-ucode/06-8f-06) at revision 0x2c000170;
    - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-07) at revision 0x2b000181;
    - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-07) at revision 0x2b000181;
    - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-07) at revision 0x2b000181;
    - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode at revision
      0x2b000181;
    - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-07) at revision 0x2b000181;
    - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-08) at revision 0x2b000181;
    - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) at
      revision 0x2c000170;
    - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-08) at revision 0x2b000181;
    - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
      intel-ucode/06-8f-08) at revision 0x2c000170;
    - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-08) at revision 0x2b000181;
    - Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) at
      revision 0x2c000170;
    - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-08) at revision 0x2b000181;
    - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode at revision
      0x2b000181;
    - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode at revision
      0x2c000170;
    - Addition of 06-b7-01/0x32 (RPL-S S0) microcode at revision 0x112;
    - Addition of 06-ba-02/0xc0 microcode at revision 0x410e;
    - Addition of 06-ba-03/0xc0 microcode (in intel-ucode/06-ba-02) at
      revision 0x410e;
    - Addition of 06-ba-02/0xc0 microcode (in intel-ucode/06-ba-03) at
      revision 0x410e;
    - Addition of 06-ba-03/0xc0 microcode at revision 0x410e;
    - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
      intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xa4 up to 0xa6;
    - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
      microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
      revision 0xf0 up to 0xf4;
    - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xf0 up
      to 0xf4;
    - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015e
      up to 0x1000161;
    - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003302
      up to 0x4003303;
    - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
      0x5003302 up to 0x5003303;
    - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002501
      up to 0x7002503;
    - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000375
      up to 0xd000389;
    - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3c up
      to 0x3e;
    - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x20 up
      to 0x22;
    - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb2
      up to 0xb8;
    - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x31 up
      to 0x32;
    - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x40 up
      to 0x42;
    - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x16 up
      to 0x17;
    - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
      0x22 up to 0x2c (old pf 0x3);
    - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
      intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
      from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
      from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
      intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x22
      up to 0x2c (old pf 0x3);
    - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
      from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
      from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
      0x421 up to 0x429;
    - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
      intel-ucode/06-9a-03) from revision 0x421 up to 0x429;
    - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
      intel-ucode/06-9a-04) from revision 0x421 up to 0x429;
    - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x421
      up to 0x429;
    - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x24000023
      up to 0x24000024;
    - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf0 up
      to 0xf4;
    - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf0
      up to 0xf4;
    - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf0
      up to 0xf4;
    - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf0
      up to 0xf4;
    - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
      0xf0 up to 0xf4;
    - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x54 up
      to 0x57;
    - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
      intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
      intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x22 up to
      0x2c (old pf 0x3);
    - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
      from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
      intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
      intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
      from revision 0x22 up to 0x2c (old pf 0x3);
    - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x22 up to
      0x2c (old pf 0x3).


author: Eugene Syromiatnikov <esyr@redhat.com> - 4:20230516-1
changelog:
  - Update Intel CPU microcode to microcode-20230516 release (#2213124):
    - Addition of 06-be-00/0x01 (ADL-N A0) microcode at revision 0x10;
    - Addition of 06-9a-04/0x40 (AZB A0) microcode at revision 0x4;
    - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
      intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006e05 up
      to 0x2006f05;
    - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
      intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xa6 up to 0xaa;
    - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf0 up
      to 0xf2;
    - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf0 up
      to 0xf2;
    - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xf0 up
      to 0xf2;
    - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xf0 up
      to 0xf2;
    - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
      microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
      revision 0xf4 up to 0xf6;
    - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xf0 up
      to 0xf2;
    - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xf0 up
      to 0xf2;
    - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xf0 up
      to 0xf2;
    - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xf0 up
      to 0xf2;
    - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xf4 up
      to 0xf8;
    - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000161
      up to 0x1000171;
    - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003303
      up to 0x4003501;
    - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
      0x5003303 up to 0x5003501;
    - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002503
      up to 0x7002601;
    - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000389
      up to 0xd000390;
    - Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x1000211
      up to 0x1000230;
    - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb8
      up to 0xba;
    - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x32 up
      to 0x33;
    - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x28 up
      to 0x2a;
    - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x42 up
      to 0x44;
    - Update of 06-8f-04/0x10 microcode from revision 0x2c000170 up to
      0x2c0001d1;
    - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode from revision
      0x2b000181 up to 0x2b000461;
    - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
      intel-ucode/06-8f-04) from revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from
      revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
      intel-ucode/06-8f-04) from revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from
      revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision
      0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b000181
      up to 0x2b000461;
    - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from
      revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
      intel-ucode/06-8f-05) from revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from
      revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
      intel-ucode/06-8f-06) from revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-06/0x10 microcode from revision 0x2c000170 up to
      0x2c0001d1;
    - Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b000181
      up to 0x2b000461;
    - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
      intel-ucode/06-8f-06) from revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision
      0x2b000181 up to 0x2b000461;
    - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from
      revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
      intel-ucode/06-8f-08) from revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from
      revision 0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
    - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision
      0x2c000170 up to 0x2c0001d1;
    - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision
      0x2b000181 up to 0x2b000461;
    - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
      0x429 up to 0x42a;
    - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
      intel-ucode/06-9a-03) from revision 0x429 up to 0x42a;
    - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
      intel-ucode/06-9a-04) from revision 0x429 up to 0x42a;
    - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x429
      up to 0x42a;
    - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf4 up
      to 0xf6;
    - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf4
      up to 0xf6;
    - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf4
      up to 0xf6;
    - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf4
      up to 0xf6;
    - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
      0xf4 up to 0xf6;
    - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x57 up
      to 0x58;
    - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x112 up
      to 0x113;
    - Update of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode from revision
      0x410e up to 0x4112;
    - Update of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode (in
      intel-ucode/06-ba-02) from revision 0x410e up to 0x4112;
    - Update of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode (in
      intel-ucode/06-ba-03) from revision 0x410e up to 0x4112;
    - Update of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode from revision 0x410e
      up to 0x4112.


author: Eugene Syromiatnikov <esyr@redhat.com> - 4:20230808-1
changelog:
  - Update Intel CPU microcode to microcode-20230808 release, addresses
    CVE-2022-40982, CVE-2022-41804, CVE-2023-23908 (#2213124, #2223992, #2230677,
      - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
      intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006f05 up
      to 0x2007006;
    - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
      intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xaa up to 0xac;
    - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf2 up
      to 0xf4;
    - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf2 up
      to 0xf4;
    - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xf2 up
      to 0xf4;
    - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xf2 up
      to 0xf4;
    - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
      microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
      revision 0xf6 up to 0xf8;
    - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xf2 up
      to 0xf4;
    - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xf2 up
      to 0xf4;
    - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xf2 up
      to 0xf4;
    - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xf2 up
      to 0xf4;
    - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xf8 up
      to 0xfa;
    - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000171
      up to 0x1000181;
    - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003501
      up to 0x4003604;
    - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
      0x5003501 up to 0x5003604;
    - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002601
      up to 0x7002703;
    - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000390
      up to 0xd0003a5;
    - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xba
      up to 0xbc;
    - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x2a up
      to 0x2c;
    - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x44 up
      to 0x46;
    - Update of 06-8f-04/0x10 microcode from revision 0x2c0001d1 up to
      0x2c000271;
    - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode from revision
      0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
      intel-ucode/06-8f-04) from revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from
      revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
      intel-ucode/06-8f-04) from revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from
      revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision
      0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b000461
      up to 0x2b0004b1;
    - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from
      revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
      intel-ucode/06-8f-05) from revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from
      revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
      intel-ucode/06-8f-06) from revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-06/0x10 microcode from revision 0x2c0001d1 up to
      0x2c000271;
    - Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b000461
      up to 0x2b0004b1;
    - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
      intel-ucode/06-8f-06) from revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision
      0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
      intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from
      revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
      intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
      intel-ucode/06-8f-08) from revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
      intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from
      revision 0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
      intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
      intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1;
    - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision
      0x2c0001d1 up to 0x2c000271;
    - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision
      0x2b000461 up to 0x2b0004b1;
    - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
      0x2c up to 0x2e;
    - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
      intel-ucode/06-97-02) from revision 0x2c up to 0x2e;
    - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
      from revision 0x2c up to 0x2e;
    - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
      from revision 0x2c up to 0x2e;
    - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
      intel-ucode/06-97-05) from revision 0x2c up to 0x2e;
    - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x2c
      up to 0x2e;
    - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
      from revision 0x2c up to 0x2e;
    - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
      from revision 0x2c up to 0x2e;
    - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
      0x42a up to 0x42c;
    - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
      intel-ucode/06-9a-03) from revision 0x42a up to 0x42c;
    - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
      intel-ucode/06-9a-04) from revision 0x42a up to 0x42c;
    - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x42a
      up to 0x42c;
    - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf6 up
      to 0xf8;
    - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf6
      up to 0xf8;
    - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf6
      up to 0xf8;
    - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf6
      up to 0xf8;
    - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
      0xf6 up to 0xf8;
    - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x58 up
      to 0x59;
    - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x113 up
      to 0x119;
    - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
      intel-ucode/06-bf-02) from revision 0x2c up to 0x2e;
    - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
      intel-ucode/06-bf-02) from revision 0x2c up to 0x2e;
    - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x2c up
      to 0x2e;
    - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
      from revision 0x2c up to 0x2e;
    - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
      intel-ucode/06-bf-05) from revision 0x2c up to 0x2e;
    - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
      intel-ucode/06-bf-05) from revision 0x2c up to 0x2e;
    - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
      from revision 0x2c up to 0x2e;
    - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x2c up
      to 0x2e;
    - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision
      0x4112 up to 0x4119 (old pf 0xc0);
    - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
      intel-ucode/06-ba-02) from revision 0x4112 up to 0x4119 (old pf 0xc0);
    - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
      intel-ucode/06-ba-03) from revision 0x4112 up to 0x4119 (old pf 0xc0);
    - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4112
      up to 0x4119 (old pf 0xc0);
    - Update of 06-be-00/0x11 (ADL-N A0) microcode from revision 0x10 up
      to 0x11 (old pf 0x1).


author: Eugene Syromiatnikov <esyr@redhat.com> - 4:20230808-2
changelog:
  - Add support for the new, more correct, variant of dracut's default
    $fw_dir path in dracut_99microcode_ctl-fw_dir_override_module_init.sh.


author: Solar Designer <solar@openwall.com> - 4:20231114-1
changelog:
  - Update Intel CPU microcode to microcode-20231114 (fixes CVE-2023-23583),
    temporarily dropping most documentation patches


